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Projects and partners
Our team is involved in several networks
European :
COST Action "Trustworthy Manufacturing and Utilization of Secure Devices"
http://www.cost.eu/domains_actions/...
National :
GDR SoC-SiP, thematic group "sécurité numérique"
http://www2.lirmm.fr/ w3mic/SOCSIP/...
Regional :
Rhone Alpes region academic research community ARC6, animation of embedded system project SEMBA.
http://projet-semba-cluster-isle-rh...
SecReSoC - Secured Reconfigurable Systems on Chip
Funding : ANR ARPEGE @2009
40-month project (2009/2013)
SecReSoC is an ANR project (ANR-09-SEGI-013) steered by the Hubert Curien Laboratory . This project corresponds to an industrial research, with joint participation of four university laboratories having complementary expertise and of one industrial partner.
The global aim of the SecReSoC project is to increase the security of reconfigurable technologies (FPGAs) at logic, architectural and system levels. Selection of FPGAs as a target technology was motivated by the fact that this technology becomes widespread in many application domains. It constitutes also an important support for prototyping and security evaluation of cryptographic architectures.
Project web page : http://labh-curien.univ-st-etienne....
Partners
Laboratoire Hubert Curien / University of Saint-Etienne (coordinator)
LIRMM laboratory / University of Montpellier
COMELEC Department / Engineers school Telecom Paris Tech
STICC Laboratory / University of Bretagne Sud
NETHEOS company / Montpellier
Contact
robert.fouquet (at) univ-st-etienne.fr
EMAISeCi – Electromagnetic Analysis and Injection of Secure Circuits
Funding : ANR ARPEGE @2010
40-month project (2010/2014)
EMAISeCi is an ANR project steered by the LIRMM Laboratory. In this project, the Hubert Curien laboratory is a partner. The project is oriented towards a fundamental research, with joint participation of four university laboratories and two industrial partners.
The objective of the EMAISeCi project is to study the electromagnetic side channel attacks (EM emission and injection faults using electromagnetic fields) on cryptographic primitives like symetric and asymetric key ciphers or true random number generators. The main objectives of the project are oriented in the development of electromagnetic emission and fault injection models for secure logic devices. Based on these models, efficient countermeasures against electromagnetic analysis and fault injection should be proposed.
Partners
LIRMM laboratory / University of Montpellier (coordinator)
Hubert Curien laboratory / University of Saint Etienne
TIMA laboratory / University of Grenoble
ENSMSE Saint-Etienne
CEA-LETI Gardanne
ST Microelectronics
Contact
alain.aubert (at) univ-st-etienne.fr
SCALA - SourCes d’ALéa pour l’Authentification de circuits électroniques (Random Sources for Electronic device Authentication)
Funding: Project Futur et Ruptures Institut TELECOM @2010
36-month project (2010/2013)
Much work was already done in the field of Physical Unclonable Functions (PUFs). However, most of the research activities mainly focuse on new PUF architecture designs. Nevertheless, as in the field of True Random Number Generators (TRNGs), these works do not still offer modeling tools aimed at estimation of the performance (security, throughput, reliability) and the quality of the generated randomness. Therefore, the main objective of the SCALA project is to propose objective, reliable and robust digital PUF characterization methods.
Partners
Laboratoire Hubert Curien / University of Saint-Etienne (project coordinator)
Laboratoire COMELEC / Telecom ParisTech
Orange Labs, France
Contact
lilian.bossuet (at) univ-st-etienne.fr
CAPRI - Cryptographic Algorithms and Primitives with Increased Resistance Against Side-Channel Attacks
Funding: Partenariat Hubert Curien – Programme STEFANIK (programme franco-slovake) @2010
24-month project (2010/2011)
Objectives
The main aim of the project is to study the cryptographic primitives composing cryptographic algorithms from the point of view of side-channel attacks and to propose a modification of existing algorithms or to propose new algorithms that will be intrinsically resistant against side-channel attacks and especially power analysis attacks. This way, the proposed methods should not need additional logic area for implementing counter-measures against side-channel attacks. The robustness of the proposed solutions will be evaluated mathematically and in hardware modules based on reconfigurable logic devices (FPGAs).
Partners
Laboratoire Hubert Curien / University of Saint-Etienne
Slovak University of Technology, Faculty of Electrical engineering and Information Technology
Contact
florent.bernard (at) univ-st-etienne.fr
SISS - Sub-project: Secure and Autonomous Product Authentication
Funding: Rhône-Alpes region @2008
36-month project (2008/2011)
This project is built around a PhD thesis that should propose new methods and authentication protocols for authentication of manufactured objects without the communication needs with the remote database server. This method implies that the original fingerprint of a product would be available (e. g. printed) on the product. In this approach, a secure embedded device called authentication device checks autonomously the authenticity of the product by comparing the physical morphometric fingerprint extracted from the product with the one printed on it. The reliability of the proposed authentication protocol is based on the authentication and the integrity checking of the authentication device. The advantage of this authentication model is that the secure authentication device can be used to authenticate multiple objects without having access to the database server.
Contact
fournel (at) univ-st-etienne.fr
alain.aubert (at) univ-st-etienne.fr
SEMBA - Sub-project: Secure True Random Numbers Generators Embedded in Asynchronous Logic Circuits
Funding: Rhône-Alpes region @2010
36-month project (2010/2013)
The SEMBA project aims to federate laboratories in the Rhône-Alpes region working in the field of embedded systems design. The PhD thesis funded via the project SEMBA should propose new principles for generating true random numbers embedded in asynchronous logic devices. Architectures of the proposed generators must be characterized from the point of view of security and hardened to resist passive and active cryptographic attacks. The principle of the proposed generators must be validated by statistical models describing generators’ behaviour during normal operation and during an attack. In addition to standard statistical tests such as NIST 800-22, DIEHARD and AIS31, a statistical test specific to the new principle should be also proposed.
Partners
Hubert Curien laboratory / University of Saint Etienne
TIMA laboratory / University of Grenoble
Contact
fischer (at) univ-st-etienne.fr
Contract DGA-MI
24-month project (2011/2012)
Context
Random numbers are used in many cryptographic applications (e.g. key generation, nonces, initialization vectors, padding, ...). The clock jitter in electronic devices is often used as a source of true randomness for random number generation. Many ways of extracting the jitter to get random numbers have been proposed in the literature. However, the quality of the random sequence is mostly evaluated only by applying a battery of statistical tests. To ensure a good quality of the random sequence, performing such tests is necessary but far from being sufficient. The source of randomness itself must be tested inside the device, during the process of random number generation.
Objectives
The aim of this project is to propose such statistical tests that are embedded in the cryptographic device as close as possible to the source of randomness. These tests should guarantee that a sufficient amount of randomness is available, e.g by measuring the jitter internally. Furthermore, these tests should also warn the user of potential (intentional or unintentional) manipulations of the source of randomness.
Partners
Laboratoire Hubert Curien / University of Saint-Etienne
DGA-MI, Bruz
Contact
florent.bernard (at) univ-st-etienne.fr